Semiconductor devices traditionally have included a through-hole design in which leads extending from a device were bent downward and passed through plated holes in a printed circuit board to be soldered in place. More recently, surface mount technology has enabled double-sided board applications which double the useful surface area on a typical printed circuit board. Surface mount packages have also increased the useful surface area on each side of the board, since the lead wires of these components do not extend significantly beyond the molded package, and thus, less surface area is needed to secure the leads to the board.
Electronic device manufacturers are, nevertheless, still driven to minimize package dimensions. A minimum area package is advantageous in miniaturizing the size of consumer products, such as notebook computers. In certain aerospace applications, size and weight considerations continue to be of paramount importance. Additionally, heat removal management is often easier with smaller package designs.
One popular semiconductor package employed in many devices is a "J"-lead quad-pack which includes about 24 leads extending from an encapsulated chip. These leads extend out and are bent in a "J"-configuration around the plastic or ceramic encapsulation material. The displacement of the leads in a quad-pack causes them to extend slightly laterally from the package. Even if this distance appears minimal, any wasted circuit board surface area limits miniaturization. Moreover, since the number of lead connections extending from the encapsulated chip is usually limited by the amount of surface area extending along the periphery of the molded semiconductor package, this surface area has become a design limitation which can potentially inhibit the implementation of further improvements to integrated circuit density.